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IRFP360
Data Sheet July 1999 File Number
2290.3
23A, 400V, 0.200 Ohm, N-Channel Power MOSFET
This advanced power MOSFET is designed, tested, and guaranteed to withstand a specified level of energy in the breakdown avalanche mode of operation. These are N-Channel enhancement mode silicon gate power field effect transistors designed for applications such as switching regulators, switching converters, motor drivers, relay drivers and drivers for high power bipolar switching transistors requiring high speed and low gate drive power. They can be operated directly from integrated circuits. Formerly developmental type TA17464.
Features
* 23A, 400V * rDS(ON) = 0.200 * Single Pulse Avalanche Energy Rated * SOA is Power Dissipation Limited * Nanosecond Switching Speeds * Linear Transfer Characteristics * High Input Impedance * Related Literature - TB334 "Guidelines for Soldering Surface Mount Components to PC Boards"
Ordering Information
PART NUMBER IRFP360 PACKAGE TO-247 BRAND IRFP360
Symbol
D
NOTE: When ordering, use the entire part number.
G
S
Packaging
JEDEC STYLE TO-247
SOURCE DRAIN GATE
DRAIN (FLANGE)
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CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures. http://www.intersil.com or 407-727-9207 | Copyright (c) Intersil Corporation 1999
IRFP360
Absolute Maximum Ratings
TC = 25oC, Unless Otherwise Specified IRFP360 400 400 23 14 92 20 250 2 1200 -55 to 150 300 260 UNITS V V A A A V W W/oC mJ oC 300 260
Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDS Drain to Gate Voltage (RGS = 20k) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VDGR Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID TC = 100oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Single Pulse Avalanche Energy Rating (Note 4). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EAS Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG Maximum Temperature for Soldering Leads at 0.063in (1.6mm) from case for 10s . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL Package Body for 10s, see Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tpkg
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE: 1. TJ = 25oC to 125oC.
Electrical Specifications
PARAMETER
TC = 25oC, Unless Otherwise Specified SYMBOL BVDSS VGS(TH) IDSS ID(ON) IGSS rDS(ON) gfs td(ON) tr td(OFF) tf Qg(TOT) Qgs Qgd CISS COSS CRSS LD Measured between the Contact Screw on Header closer to Source and Gate Pins and Center of Die Measured from the Source Lead, 6mm (0.25in) from Header and Source Bonding Pad Modified MOSFET Symbol Showing the Internal Device Inductances
D LD G LS S
TEST CONDITIONS ID = 250A, VGS = 0V (Figure 10) VGS = VDS, ID = 250A VDS = Rated BVDSS, VGS = 0V VDS = 0.8 x Rated BVDSS, VGS = 0V, TJ = 125oC VDS > ID(ON) x rDS(ON)MAX, VGS = 10V VGS = 20V ID = 13A, VGS = 10V (Figures 8, 9) VDS 50V, IDS > 13A (Figure 12) VDD = 200V, ID 25A, RGS = 4.3, VGS = 10V, RL = 7.5 MOSFET Switching Times are Essentially Independent of Operating Temperature VGS = 10V, ID = 25A, VDS = 0.8 x Rated BVDSS IG(REF) = 1.5mA (Figure 14) Gate Charge is Essentially Independent of Operating Temperature VDS = 25V, VGS = 0V, f = 1MHz (Figure 11)
MIN 400 2 23 14 -
TYP 0.18 21 22 94 80 66 68 17 24 4000 550 97 5.0
MAX 4 25 250 100 0.20 33 140 120 99 100 -
UNITS V V A A A nA S ns ns ns ns nC nC nC pF pF pF nH
Drain to Source Breakdown Voltage Gate Threshold Voltage Zero Gate Voltage Drain Current
On-State Drain Current (Note 2) Gate to Source Leakage Current On Resistance (Note 2) Forward Transconductance (Note 2) Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Total Gate Charge (Gate to Source + Gate to Drain) Gate to Source Charge Gate to Drain "Miller" Charge Input Capacitance Output Capacitance Reverse Transfer Capacitance Internal Drain Inductance
Internal Source Inductance
LS
-
13
-
nH
Thermal Resistance Junction to Case Thermal Resistance Junction to Ambient
RJC RJA Free Air Operation
-
-
0.50 30
oC/W oC/W
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IRFP360
Source to Drain Diode Specifications
PARAMETER Continuous Source to Drain Current Pulse Source to Drain Current (Note 2) SYMBOL ISD ISDM TEST CONDITIONS Modified MOSFET Symbol Showing the Integral Reverse P-N Junction Rectifier
G D
MIN -
TYP -
MAX 23 92
UNITS A A
S
Source to Drain Diode Voltage (Note 2) Reverse Recovery Time Reverse Recovery Charge NOTES:
VSD trr QRR
TJ = 25oC, ISD = 23A, VGS = 0V (Figure 13) TJ = 25oC, ISD = 25A, dISD/dt = 100A/s TJ = 25oC, ISD = 25A, dISD/dt = 100A/s
200 3.1
460 7.1
1.8 1000 16
V ns C
2. Pulse test: pulse width 300s, duty cycle 2%. 3. Repetitive rating: pulse width limited by Max junction temperature. See Transient Thermal Impedance curve (Figure 3). 4. VDD = 50V, starting TJ = 25oC, L = 4mH, RG = 25, Peak IAS = 23A.
Typical Performance Curves
1.2 POWER DISSIPATION MULTIPLIER 1.0
Unless Otherwise Specified
25
0.8 0.6 0.4 0.2 0
ID, DRAIN CURRENT (A)
20
15
10
5
0 0 50 100 150 25 50 75 100 125 150 TC , CASE TEMPERATURE (oC) TC , CASE TEMPERATURE (oC)
FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE TEMPERATURE
FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs CASE TEMPERATURE
1
ZJC, TRANSIENT THERMAL IMPEDANCE (oC/W)
0.5 0.1 0.2 0.1 0.05 10-2 0.02 0.01 SINGLE PULSE 10-3 10-5 t1 t2 NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZJC + TC 0.1 10-3 10-2 t1, RECTANGULAR PULSE DURATION (S) 1 10 PDM
10-4
FIGURE 3. TRANSIENT THERMAL IMPEDANCE
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IRFP360 Typical Performance Curves
103 OPERATION IN THIS AREA IS LIMITED BY rDS(ON) ID, DRAIN CURRENT (A) 102 10s 100s 10 1ms 10ms 1 TC = 25oC TJ = MAX RATED SINGLE PULSE 0.1 1 102 VDS , DRAIN TO SOURCE VOLTAGE (V) 10 103 DC
Unless Otherwise Specified (Continued)
40 VGS = 10V 32 VGS = 6.0V 24 VGS = 5.5V PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX
ID, DRAIN CURRENT (A)
16
8
VGS = 5.0V VGS = 4.5V VGS = 4.0V 160 200
0
0
40
80
120
VDS , DRAIN TO SOURCE VOLTAGE (V)
FIGURE 4. FORWARD BIAS SAFE OPERATING AREA
FIGURE 5. OUTPUT CHARACTERISTICS
40 PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX ID, DRAIN CURRENT (A) 32 VGS = 6.0V 24 ID, DRAIN CURRENT (A) VGS = 10V
102
PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX VDS 50V
10
16
VGS = 5.5V
TJ = 150oC 1
TJ = 25oC
8 VGS = 4.0V 0 0 2 4 6
VGS = 5.0V VGS = 4.5V 8 10
0.1
0
VDS , DRAIN TO SOURCE VOLTAGE (V)
2 4 6 8 VSD , GATE TO SOURCE VOLTAGE (V)
10
FIGURE 6. SATURATION CHARACTERISTICS
FIGURE 7. TRANSFER CHARACTERISTICS
2.0
NORMALIZED DRAIN TO SOURCE ON RESISTANCE
PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX
3.0
rDS(ON), DRAIN TO SOURCE ON RESISTANCE
1.6 VGS = 10V 1.2
2.4
PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX VGS = 10V, ID =13A
1.8
0.8
1.2
0.4
VGS = 20V
0.6
0
0 0 30 60 90 ID , DRAIN CURRENT (A) 120 150
-40
0
40
80
120
160
TJ , JUNCTION TEMPERATURE (oC)
FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE VOLTAGE AND DRAIN CURRENT
FIGURE 9. NORMALIZED DRAIN TO SOURCE ON RESISTANCE vs JUNCTION TEMPERATURE
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IRFP360 Typical Performance Curves
1.25 NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE ID = 250A 1.15 8000 C, CAPACITANCE (nF) CISS 6000 COSS 4000
Unless Otherwise Specified (Continued)
10000 VGS = 0V, f = 1MHz CISS = CGS + CGD CRSS = CGD COSS CDS + CGD
1.05
0.95
0.85
2000
CRSS
0.75
-40
0
40
80
120
160
0
1
TJ , JUNCTION TEMPERATURE (oC)
2 5 10 2 5 VDS, DRAIN TO SOURCE VOLTAGE (V)
102
FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE vs JUNCTION TEMPERATURE
FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
50 gfs, TRANSCONDUCTANCE (S)
ISD, SOURCE TO DRAIN CURRENT (A)
40
PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX VDS 50V
102 PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX
30
TJ = 25oC
TJ = 150oC 10 TJ = 25oC
20 TJ = 150oC 10
0
1 0 10 20 30 ID , DRAIN CURRENT (A) 40 50
0
0.4 0.8 1.2 VSD , SOURCE TO DRAIN VOLTAGE (V)
1.6
FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT
FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE
20 VGS , GATE TO SOURCE VOLTAGE (V) ID = 25A 16 VDS = 80V VDS = 320V
12
8
4
0
0
25
50
75
100
125
Qg, GATE CHARGE (nC)
FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE
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IRFP360 Test Circuits and Waveforms
VDS BVDSS L VARY tP TO OBTAIN REQUIRED PEAK IAS VGS DUT tP RG IAS VDD tP VDS VDD
+
-
0V
IAS 0.01
0 tAV
FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT
FIGURE 16. UNCLAMPED ENERGY WAVEFORMS
tON td(ON) tr RL VDS 90%
tOFF td(OFF) tf 90%
+
RG DUT
-
VDD
0
10% 90%
10%
VGS VGS 0 10%
50% PULSE WIDTH
50%
FIGURE 17. SWITCHING TIME TEST CIRCUIT
FIGURE 18. RESISTIVE SWITCHING WAVEFORMS
CURRENT REGULATOR
VDS (ISOLATED SUPPLY) VDD SAME TYPE AS DUT Qg(TOT) Qgd Qgs D VDS VGS
12V BATTERY
0.2F
50k 0.3F
G
DUT 0
IG(REF) 0 IG CURRENT SAMPLING RESISTOR
S VDS ID CURRENT SAMPLING RESISTOR IG(REF) 0
FIGURE 19. GATE CHARGE TEST CIRCUIT
FIGURE 20. GATE CHARGE WAVEFORMS
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IRFP360
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Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
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